Abstract

  • In this class, we will have a broader view of processor architectures including the memory and I/O subsystems. The class emphasizes the use of simple analytical methods to bound the design space before the use of extensive simulations. We model general systems with multiprocessors and shared memories using the queuing theory and analyze the performance and associated costs. We will look at practical design targets given the current trends in the technology and look at their area, time, and power consumption.

Outline

    •  Basics and evaluation metrics: Design of instruction sets, historical examples, area and time tradeoffs, technology trends, economics of a processor design, metrics.
    • Programs and processors: Multimedia, networking, security, and number crunching programs behave differently. How does that affect the design of a processor?
    • Memories and queuing models: Cache organizations and models, effect of technology on memories, cache and memory interleaving, queuing models.
    • Concurrent processors: vector and out-of-order processors, multiprocessors, shared buses, interconnection network.
    • Input and Output: Networks, I/O systems, disk arrays.

Goals

  • By the end of the class, the student should be able to balance the performance and cost of processor designs through analytical means before engaging in extensive simulations.

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